american microsystems, inc. october 2000 this document contains information on a preproduction product. specifications and information herein are subject to change with out notice. 10.31.00 iso9001 iso9001 iso9001 iso9001 qs9000 qs9000 qs9000 qs9000 FS6070-01 FS6070-01 FS6070-01 FS6070-01 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic preliminar y information preliminar y information preliminar y information preliminar y information 1.0 features ? distributes one differential hstl or hcsl reference clock to two banks of two single-ended lvttl out- puts ? divsel pin selects output divide-by-three or divide- by-four of input frequency ? lvttl output-enable control for each bank ? input-to-output propagation delay: 5ns at 66.7mhz ? 16-pin (0.150 ) soic and (4.4mm) tssop available figure 1: pin configuration 1 2 3 4 5 6 7 8 16 15 14 13 12 11 divsel vdd vdd vdd vdd href_n vss vss oe_0 10 9 q0_2 q1_4 oe_1 fs6070 href_p vss q1_3 q0_1 figure 2: block diagram fs6070 q0_1 q0_2 q1_3 q1_4 href_p href_n oe_0 vdd vss oe_1 table 1: clock enable configuration control clock outputs oe_0 oe_1 divsel q0_1:2 q1_3:4 0 0 x tristate tristate 01 0 tristate href 3 01 1 tristate href 4 1 0 0 href 3 tristate 1 0 1 href 4 tristate 1 1 0 href 3 href 3 1 1 1 href 4 href 4 table 2: pin descriptions key: di = digital input; di u = input with internal pull-up; di d = input with internal pull-down; dio = digital input/output; do = digital output; p = power/ground; # = active-low pin pin type name description 4 ai href_p hstl input (true) 5 ai href_n hstl input (complement) differential input 14 do q0_1 lvttl clock output 13 do q0_2 lvttl clock output output bank 0 12 do q1_3 lvttl clock output 11 do q1_4 lvttl clock output output bank 1 1 di divsel divider selection control input 8di oe_0 bank 0 output enable control; also used with divsel, oe_1 to select dividers 9di oe_1 bank 1 output enable control; also used with divsel, oe_0 to select dividers 2, 3, 15,16 p vdd 3.3v power supply 6, 7, 10 p vss ground figure 3: divide-by-3, divide-by-4 timing href_n q0_1:2, q1_3:4 (divide by 4) href_p q0_1:2, q1_3:4 (divide by 3) t phl t plh t phl t plh v x
american microsystems, inc. october 2000 iso9001 iso9001 iso9001 iso9001 qs9000 qs9000 qs9000 qs9000 2 FS6070-01 FS6070-01 FS6070-01 FS6070-01 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic preliminary information preliminary information preliminary information preliminary information 2.0 electrical specifications table 3: absolute maximum ratings stresses above those listed under absolute maximum ratings may cause permanent damage to the device. these conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. exposure to maximum rati ng conditions for extended conditions may affect device performance, functionality, and reliability. parameter symbol min. max. units supply voltage (v ss = ground) v dd v ss -0.5 7 v input voltage, dc v i v ss -0.5 v dd +0.5 v output voltage, dc v o v ss -0.5 v dd +0.5 v input clamp current, dc (v i < 0 or v i > v dd )i ik -50 50 ma output clamp current, dc (v i < 0 or v i > v dd )i ok -50 50 ma storage temperature range (non-condensing) t s -65 150 c ambient temperature range, under bias t a -55 125 c junction temperature t j 125 c lead temperature (soldering, 10s) 260 c input static discharge voltage protection (mil-std 883e, method 3015.7) 2 kv caution: electrostatic sensitive device permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy ele c- trostatic discharge. table 4: operating conditions parameter symbol conditions/description min. typ. max. units supply voltage v dd 3.135 3.3 3.465 v operating temperature range t a 070c load capacitance c l q0_1:2, q1_3:4 10 30 pf reference frequency range f href c l = 30pf 250 mhz input signal edge rate 1.0 v/ns input duty cycle 40 60 % input high-level voltage v ih v x + 0.1 1.2 v input low-level voltage v il v ss - 0.3 v x - 0.1 v input differential cross point voltage v x required hstl signalling parameters 0.68 0.90 v
american microsystems, inc. october 2000 iso9001 iso9001 iso9001 iso9001 qs9000 qs9000 qs9000 qs9000 3 preliminary information preliminary information preliminary information preliminary information FS6070-01 FS6070-01 FS6070-01 FS6070-01 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic table 5: dc electrical specifications unless otherwise stated, all power supplies = 3.465v, no load on any output, and ambient temperature range t a = 0c to 70c. parameters denoted with an asterisk ( * ) represent nominal charac- terization data and are not currently production tested to any specific limits. min and max characterization data are 3 f rom typical. negative currents indicate current flows out of the device. parameter symbol conditions/description min. typ. max. units overall i dd f href = 200.0mhz, f out = 66.67mhz (divide-by-3) all supplies = 3.465v 45 supply current, dynamic, with loaded outputs f href = 200.0mhz, f out = 50.00mhz (divide-by-4); all supplies = 3.465v 35 ma supply current, static i dds href stopped either high or low 1 ma hstl reference input (href_p, href_n) high-level input voltage v ih v x + 0.1 v dd +0.3 v low-level input voltage v il v ss -0.3 v x - 0.1 v differential cross point voltage v x see table 4 for proper hstl signal input levels 2.2 v input leakage current i il -5 5 a lvttl digital inputs (oe_0, oe_1, divsel) high-level input voltage v ih 2.0 v dd +0.3 v low-level input voltage v il v ss -0.3 0.8 v input leakage current i il -5 5 a lvttl clock outputs (q0_1:2, q1_3:4) i oh min v dd = 3.135v, v o = 1.0v -33 -74 high level output source current i oh max v dd = 3.465v, v o = 3.135v -22 -33 ma i ol min v dd = 3.135v, v o = 1.95v 30 90 low level output sink current i ol max v dd = 3.465v, v o = 0.4v 34 38 ma z ol measured at 1.65v, output driving low 12 18 55 output impedance z oh measured at 1.65v, output driving high 12 22 55 ? tristate output current i oz -10 10 a short circuit output source current i osh v o = 0v; shorted for 30s, max. -85 ma short circuit output sink current i osl v o = 3.3v; shorted for 30s, max. 98 ma
american microsystems, inc. october 2000 iso9001 iso9001 iso9001 iso9001 qs9000 qs9000 qs9000 qs9000 4 FS6070-01 FS6070-01 FS6070-01 FS6070-01 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic preliminary information preliminary information preliminary information preliminary information table 6: ac timing specifications unless otherwise stated, all power supplies = 3.465v, no load on any output, and ambient temperature range t a = 25c. parameters denoted with an asterisk ( * ) represent nominal characterization data and are not currently production tested to any specific limits. min and max characterization data are 3 f rom typical. parameter symbol conditions/description min. typ. max. units overall propagation delay t plh, t phl 1.5 6.0 8.0 ns output tristate enable delay * t dzl, t dzh 1.0 10 ns output tristate disable delay * t dlz, t dhz 1.0 10 ns lvttl clock outputs (q0_1:2, q1_3:4) divide by 3 45 50.7 55 duty cycle * d t ratio of high pulse width to one clock period, measured at v x divide by 4 45 49.5 55 % output skew * t sk(o) one clock output relative to another at 1.5v, with both outputs at the same frequency, c l = 30pf 90 ps t r min measured at 0.4v ? 2.4v; c l = 10pf 1.0 1.2 rise time * t r max measured at 0.4v ? 2.4v; c l = 30pf 1.7 2.0 ns t f min measured at 2.4v ? 0.4v; c l = 10pf 1.0 1.0 fall time * t f max measured at 2.4v ? 0.4v; c l = 30pf 1.8 2.0 ns table 7: q0, q1 clock outputs low drive current (ma) high drive current (ma) voltage (v) min. max. voltage (v) min. max. 0.000 0.0 0.0 0.000 -45.5 -132.2 0.165 10.0 24.2 0.165 -45.2 -131.4 0.330 19.1 45.9 0.330 -44.9 -130.5 0.495 27.1 65.2 0.495 -44.5 -129.5 0.660 34.2 82.3 0.660 -44.2 -128.4 0.825 40.4 97.2 0.825 -43.8 -127.2 0.990 45.6 110.1 0.990 -43.3 -125.8 1.155 50.0 121.1 1.155 -42.8 -124.1 1.320 53.5 130.2 1.320 -42.1 -122.1 1.485 56.2 137.1 1.485 -41.0 -119.5 1.650 58.0 141.7 1.650 -39.5 -116.1 1.815 59.2 144.2 1.815 -37.4 -111.7 1.980 59.9 145.6 1.980 -34.7 -106.1 2.145 60.5 146.5 2.145 -31.5 -99.3 2.310 60.9 147.2 2.310 -27.7 -91.4 2.475 61.2 147.7 2.475 -23.4 -82.2 2.640 61.4 148.2 2.640 -18.4 -71.8 2.805 61.7 148.5 2.805 -12.9 -60.1 2.970 61.8 148.8 2.970 -6.7 -47.1 3.135 62.0 149.1 3.135 0.0 -32.8 3.300 149.4 3.300 -17.1 3.465 149.6 3.465 0.0 -150 -125 -100 -75 -50 -25 0 25 50 75 100 125 150 00.511.522.533.5 output voltage (v) output current (ma) 30? 50? 90? data in this table represents nominal characterization data only
american microsystems, inc. october 2000 iso9001 iso9001 iso9001 iso9001 qs9000 qs9000 qs9000 qs9000 5 preliminary information preliminary information preliminary information preliminary information FS6070-01 FS6070-01 FS6070-01 FS6070-01 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 3.0 package information table 8: 16-pin soic (0.150") package dimensions dimensions inches millimeters min. max. min. max. a 0.061 0.068 1.55 1.73 a1 0.004 0.0098 0.102 0.249 a2 0.055 0.061 1.40 1.55 b 0.013 0.019 0.33 0.49 c 0.0075 0.0098 0.191 0.249 d 0.386 0.393 9.80 9.98 e 0.150 0.157 3.81 3.99 e 0.050 bsc 1.27 bsc h 0.230 0.244 5.84 6.20 h 0.010 0.016 0.25 0.41 l 0.016 0.035 0.41 0.89 0 8 0 8 be d a 1 seating plane h e 16 1 all radii: 0.005" to 0.01" base plane a 2 c l 7 typ. h x 45 a american microsystems, inc. r table 9: 16-pin soic (0.150") package characteristics parameter symbol conditions/description typ. units thermal impedance, junction to free-air ja air flow = 0 m/s 109 c/w corner lead 4.0 lead inductance, self l 11 center lead 3.0 nh lead inductance, mutual l 12 any lead to any adjacent lead 0.4 nh lead capacitance, bulk c 11 any lead to v ss 0.5 pf
american microsystems, inc. october 2000 iso9001 iso9001 iso9001 iso9001 qs9000 qs9000 qs9000 qs9000 6 FS6070-01 FS6070-01 FS6070-01 FS6070-01 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic preliminary information preliminary information preliminary information preliminary information 4.0 package information table 10: 16-pin tssop (4.4mm) package dimensions dimensions inches millimeters min. max. min. max. a - 0.0472 - 1.20 a 1 0.002 0.006 0.05 0.15 a 2 0.0315 0.041 0.80 1.05 b 0.0075 0.0118 0.19 0.30 c 0.0035 0.0079 0.09 0.20 d 0.193 0.201 4.90 5.10 e 0.252 bsc 6.40 bsc e 1 0.169 0.177 4.30 4.50 e 0.0256 bsc 0.65 bsc s 0.0079 - 0.20 - l 0.0177 0.0295 0.45 0.75 1 0 8 0 8 2 12 ref 12 ref 3 12 ref 12 ref american microsystems, inc. b e d a 1 seating plane base plane a 2 a c l 1 3 2 s e e 1 1 16 table 11: 16-pin tssop (4.4mm) package characteristics parameter symbol conditions/description typ. units thermal impedance, junction to free-air ja air flow = 0 m/s 89 c/w corner lead plus wire 2.361 lead inductance, self l 11 center lead plus wire 1.443 nh corner lead plus wire, to first adjacent lead 0.754 l 12 center lead plus wire, to first adjacent lead 0.367 corner lead plus wire, to next adjacent lead 0.293 lead inductance, mutual l 13 center lead plus wire, to next adjacent lead 0.249 nh any corner lead plus wire to v ss 0.375 lead capacitance, bulk c 11 any center lead plus wire to v ss 0.254 pf any corner lead plus wire to first adjacent lead 0.137 c 12 any center lead plus wire to first adjacent lead 0.053 any corner lead plus wire to next adjacent lead 0.008 lead capacitance, mutual c 13 any center lead plus wire to next adjacent lead 0.006 pf
american microsystems, inc. october 2000 iso9001 iso9001 iso9001 iso9001 qs9000 qs9000 qs9000 qs9000 7 preliminary information preliminary information preliminary information preliminary information FS6070-01 FS6070-01 FS6070-01 FS6070-01 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 1:4 hstl to lvttl fanout buffer ic 5.0 ordering information table 12: device ordering codes device number ordering code package type operating temperature range shipping configuration 13710-801 16-pin (0.150?) soic FS6070-01 13710-201 16-pin (4.4mm) tssop 0 c to 70 c (commercial) tape and reel 6.0 revision information date page description 7/31/00 - this document contains information on a new product. specifications and information herein are subject to change without notice. 8/1/00 1 flipped href_p, href_n signals in timing diagram, revised dc electrical specs. 6, 7 added 16-pin tssop 10/18/00 - this document contains information on a preproduction product. specifications and information herein are subject to change without notice. copyright ? 2000 american microsystems, inc. devices sold by ami are covered by the warranty and patent indemnification provisions appearing in its terms of sale only. ami makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the fr eedom of the described devices from patent infringement. ami makes no warranty of merchantability or fitness for any purposes. ami re - serves the right to discontinue production and change specifications and prices at any time and without notice. ami?s products are intended for use in commercial applications. applications requiring extended temperature range, unusual environmental require- ments, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recom- mended without additional processing by ami for such applications. american microsystems, inc., 2300 buckskin rd., pocatello, id 83201, (208) 233-4690, fax (208) 234-6796, www address: http://www.amis.com e-mail: tgp@amis.com
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